Shadows of the A6: What to expect from Apple’s next microprocessor

Shadows of the A6: What to expect from Apple’s next microprocessor
Apple’s next-generation mobile CPU (expected to be labeled the A6) has been the subject of a great deal of speculation of late, despite the fact that the A5 is barely six months old and has yet to debut inside an iPhone .

. Details on the A6 are scattered and somewhat contradictory in a few places, but a little educated guessing is enough to fill in some of the gaps.

If you’re coming here after watching the iPhone 5 event, please bear in mind that this story is over a year old. Apple hasn’t yet announced what’s actually inside the A6, but we suspect it’s a dual-core Cortex-A15. For more information, see our story detailing the iPhone 5.

First off, the A6 will almost certainly be manufactured at TSMC. Samsung handled Apple’s A4/A5, but the legal battle between the two companiesover the Galaxy line of tablets and smartphones has long since passed the point at which it might be deemed a negotiation tactic. The architectural constraints of 28nm production are an additional barrier to any theoretical manufacturer swap. Samsung, IBM, and GlobalFoundries all opted for a gate-first manufacturing technique at 28nm, while Intel and TSMC went with what’s known as gate-last. There’s no switching between the two; Apple would have to redesign the entire processor if it wanted to port from Samsung to TSMC (or vice versa).

If current rumors are accurate, the A6 will be a quad-core Cortex-A9 on 28nm. This will make it one of the first 28nm CPUs on the market; Apple may have chosen to balance the risk associated with being on the bleeding edge of the production curve with a conservative, well-known quad-core design. Qualcomm’s dual-core MSM8960Cortex-A15-class processor is expected to launch early next year at a clock speed of 1.5-1.7GHz. Apple’s clock speed targets will likely be more modest, though the company could potentially define a range of frequencies depending on the number of cores currently operating.

One issue that’s been confusedly reported is whether or not the A6 will adopt 3D manufacturing. Intel demonstrated what it calls Tri-gate transistorsearlier this year, which was followed by news in May that TSMC would wait until 20nm to adopt a similar manufacturing technique. Then, in July, came announcements that TSMC could beat Intel to the punch with the first commercially available 3D chip technology.

There’s 3D and “3D”

Intel’s Tri-gate technology is a method for building a 3D transistor. TSMC’s 3D technology refers to chip-stacking; it’s a method for layering ICs on top of each other and connecting them through the use of TSVs (through-silicon-vias). The term refers to vertical electrical connections that pass through the silicon wafer and connect components vertically, rather than horizontally.

A 3D stack of conventional silicon (above left); Intel’s Tri-Gate 3D transistor technology (above right)

Both technologies claim to reduce power consumption and improve performance, but TSMC’s approach promises to substantially reduce die sizes compared to traditional 2D layouts. TSVs can be used to design a microprocessor in which a layer of embedded DRAM or shared cache sits on top of the microprocessor rather than beside it. Multiple ICs, each containing a different type of circuit, can be linked through the use of TSVs, and the technique can be used to drastically shorten interconnect lengths. This has a direct impact on current leakage, and therefore power consumption. It can also be used to cut communication latencies by repositioning chip components to sit on top of each other.

Apple may have used 3D stacking technology in the A6 to reduce the chip’s power consumption below even what the Cortex-A9 would normally offer at 28nm. Such a move could give Apple a significant advantage, provided that everything comes together, and that last is a bit dubious. As process nodes shrink, the difficulty and cost of bringing a new node online has grown exponentially. TSMC’s major, long-term problems at 40nm are only one example. AMD’s decision to spin off its manufacturing arm was driven partly by the steeply rising costs of keeping up with Intel; the foundry alliance between Samsung, IBM, and GlobalFoundries is another example of companies sharing development costs.

iPad 3

Current predictions for when we’ll see the A6 imply that the chip may not show until Q2 2012 at the earliest. This would put its launch well past the anticipated early 2012 release date on the iPad 3, but it’s possible that Apple may be hedging its bets. The company could wrap the iPad 3 around an A5 with additional power-saving enhancements, or it may have opted to design a version of the A6 using a conventional 2D layout. This would be an expensive way to go, but might make sense depending on the state of TSMC’s production lines.

Based on what’s known at the moment, it appears that the A6 will be based on a proven architecture but could incorporate multiple cutting-edge manufacturing enhancements. As such, it could prove an extremely effective challenger to the next-generation designs expected from Qualcomm and Nvidia. Apple’s devices are typically marketed around experiences and are less concerned with tech specs; a move towards longer battery life and moderately improved performance as opposed to focusing on next-generation CPU technology(Qualcomm) or an improved GPU(Tegra) would be in line with with that philosophy.